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A modified AES based algorithm for image encryption
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The AES algorithm is used in some applications that require fast processing such as smart cards, cellular phones and image-video encryption This paper proposes new encryption schemes as a modification of AES algorithm

Hardware implementation of AES algorithm
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The paper presents a hardware implementation of the AES algorithm developed for an external data storage unit in a dependable application. The algorithm was implemented in FPGA using the development board Celoxica RC1000 and development suite Celoxica DK.

Simulation of image encryption using AES algorithm
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ABSTRACT With the fast progression of data exchange in electronic way, information security is becoming more important in data storage and transmission. Because of widely using images in industrial process, it is important to protect the confidential image data from

FPGA implementations of high throughput sequential and fully pipelined AES algorithm
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ABSTRACT In this paper, we use FPGA chips to realize the high throughput 128 bits AES cipher processor with new high-speed and hardware sharing functional blocks. The AES functional calculations include four transformation stages, which are the SubBytes, the

Modifications to aes algorithm for complex encryption
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Summary The Advanced Encryption Standards algorithm was originally proposed by Rijmen and Daemen (Rijndael algorithm) in June 1998. This algorithm is widely accepted due to its strong encryption, complex processing and its resistance to Brute-force attack. The proposed

Reconfigurable implementation for the AES algorithm
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Abstract The choice of a platform, software, ASIC or FPGA, is driven by several aspects, such as algorithm performance, cost and flexibility. Although ASIC has the highest performance and the lowest unit cost, it has no flexibility at all. While software has the most

Encryption-compression of images based on FMT and AES algorithm
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Abstract The use of the data-processing networks, for the transmission and the transfer of the data, must satisfy two objectives which are: the reduction of the volume of information to free, the maximum possible, the public networks of communication, and the protection in order to

Generation of AES key dependent S-boxes using RC4 algorithm
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Table 7. Randomness tests for AES and AES-RC4 Test type Maximum test value Normal AES algorithm AES-RC4 algorithm Frequency test 6.63 0.06 Pass 0.35 Pass Poker test 18.4 5.0 Pass 8.19 Pass Long run 34 22 Pass 20 Pass run 13.2 2.02 Pass 5.45 Pass

A new image encryption approach using the integration of a shifting technique and the AES algorithm
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ABSTRACT In this paper, a new image encryption technique is proposed based on the integration of shifted image blocks and basic AES, where the shifted algorithm technique is used to divide the image into blocks. Each block consists of number of pixels, and these

Parallelization of the AES Algorithm
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Abstract:-In this paper we present the parallelization process of the AES algorithm (Rijndael) along with the description of exploited parallelization tools. The data dependences analysis of loops and appropriate loop transformations were applied in order to parallelize the

A low-cost reconfigurable architecture for AES algorithm
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Abstract This paper proposes a low-cost reconfigurable architecture for AES algorithm . The proposed architecture separates SubBytes and MixColumns into two parallel data path, and supports different bit-width operation for this two data path. As a result, different number of S-

Aes algorithm implementation using arm processor
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ABSTRACT The AES encryption/decryption algorithm is widely used in modern consumer electronic products for security. To shorten the encryption/decryption time of plenty of data, it is necessary to adopt the algorithm of hardware implementation; however, it is possible to

A novel S-box of AES algorithm using variable mapping technique
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Abstract: The implementation of a wide, complex and varied networks, let the security development has great importance to the communication innovation. The advance encryption standard ( AES ) algorithm considered to be the leader of this innovation. A large

FPGA implementation of reconfigurable parameters AES algorithm
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Abstract: In this paper, a novel method of using customized (AES) variable parameters is introduced. This method depends on a continuous parameters reconfiguration and a customization of each internal block. The customization depends on varying the four

File Encryption, Decryption Using AES Algorithm in Android Phone
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Abstract Nowadays smart gadgets including smart phones and tablets are gaining huge popularity. Comparing with conventional computer, smart phone is easily carried out and provides much computer functionality, such as processing, communication, data storage as

Implementation of Advanced Encryption Standard ( AES ) Algorithm Based on FPGA
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Abstract The importance of cryptography applied to security in electronic data transactions has acquired an essential relevance during the last few years. A proposed FPGA-based implementation of the Advanced Encryption Standard ( AES ) algorithm is presented in this

AES-128 bit algorithm using fully pipelined architecture for secret communication
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ABSTRACT In this paper, an efficient method for high speed hardware implementation of AES algorithm is presented. So far, many implementations of AES have been proposed, for various goals that effect the Sub Byte transformation in various ways

The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation.
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Abstract: This article presents an architecture that encrypts data with the AES algorithm . This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining and dynamic total reconfiguration (DTR). The originality of our implementation is that it

AES Algorithm Adapted on GPU Using CUDA for Small Data and Large Data Volume Encryption
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Abstract:-The goal of this paper is to study the possibility of using alternative computing solution in cryptography, the use of a graphic processing unit in non graphical calculations. We tried to use the graphic processing unit as a cryptographic coprocessor in order to obtain

Replace AES key expansion algorithm by modified genetic algorithm
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This paper presents new algorithms that simplify the creation and expansion process of the encryption key of the AES algorithm which is considered one of the most important elements in the process of encryption, by creating new key generator architectures that allows us to

A Novel Approach to Improve Avalanche Effect of AES Algorithm
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Abstract With the rapid progression of digital data exchange in electronic way, security of information is becoming more important in data storage and transmission. Therefore numerous ways of protecting information are being utilized by individuals, businesses, and

Design and implementation of encryption unit based on customized AES algorithm
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(Advanced Encryption Standard) as the encryption algorithm because it has been extensively challenged, evaluated, and, it is the most popularly used symmetric key algorithm. In this paper, we propose a customized version of the AES block cipher to suit

A new algorithm to construct secure keys for AES
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A new S-box structure named Affine-Power-Affine, International Journal of Innovative Computing, Information and Control,

AES Algorithm for Secured Wireless Communication
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Abstract Data Security is primary concern for every communication system. There are many ways to provide security data that is being communicated. However, security is assured irrespective of the hackers are from the noise. This Paper describes a design of

Parallelization of AES algorithm using OpenMP
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Information Processing Standard (FIPS), is an approved cryptographic algorithm that can be used to protect electronic data. AES is a complex algorithm that requires large number of mathematical computations to be done. A sequential implementation would require a

The efficient implementation of S8 AES algorithm
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Abstract Information security using minimal hardware and software resources is very indispensable in mission and safety critical applications. Currently, various methodologies have been proposed in which hardware exhibits parallelism either implicitly or explicitly. In

Application specific scalable architectures for advanced encryption standard ( aes ) algorithm
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Abstract:-The work presented proposes two diverse FPGA based architectures with high- speed and low area constraints for suitable implementation of Advanced Encryption Standard (AES). The main focus of this paper is to compare different design architectures

AES-128 performance in Tinyos with CBC algorithm (WSN)
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The key length of 128 bits is used in process of encryption. The AES algorithm is a block cipher that uses the same binary key both to encrypt and decrypt data blocks is called a symmetric key cipher AES algorithm is a symmetric block cipher that can encrypt (encipher) and

Review Paper on FPGA based Implementation of Advanced Encryption Standard ( AES ) Algorithm
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Abstract: The importance of cryptography applied to security in electronic data transactions has acquired an essential relevance during the last few years. A proposed FPGA-based implementation of the Advanced Encryption Standard ( AES ) algorithm is presented in this

Encryption and decryption of text using AES algorithm
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Abstract Data Security is primary concern for every communication system. There are many ways to provide security to data that is being communicated. This Paper describes a design of effective security for data communication by AES algorithm for encryption and

Image encryption and decryption using AES algorithm
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ABSTRACT Data Security is primary concern for every communication system. The relentless growth of Internet and communication technologies has made the extensive use of images unavoidable. There are many ways to provide security to data that is being

Performance Measurment of AES Crypto Algorithm in Microcode Environment of IXP2400 Platform
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Then I do some performance measurement based on the memory optimization and thread optimization. I apply a pipelined and best parallelized approach of implementing the AES algorithm Section 2 presents the over view of the 128-bit AES algorithm

Secured High throughput implementation of AES Algorithm
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Abstract Cryptography is the study of Mathematical techniques for secured communication in the presence of adversaries and also it deals with the aspects of information security such as confidentiality, data integrity, entity authentication and data origin authentication. A high

Digital arithmetic coding with AES algorithm
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ABSTRACT The paper presents the security and compression of data by Digital Arithmetic coding with AES (Advanced Encryption Standard) algorithm. basic research is to arithmetically encode the data first and then encrypt it by using AES algorithm then transmits

An Optimized FPGA Implementation of an AES Algorithm for Embedded Applications
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ABSTRACT The run time reconfiguration (RTR) temporal partitioning can be applied to the reconfigurable embedded system design in order to optimize an implementation. In this paper we present the implementation of an Advanced Encryption Standard ( AES ) algorithm

Design Implementation Of AES Algorithm Over FPGA Using VHDL
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Abstract: Security is an important parameter to be considered with the growth of electronic communication. A key is used in algorithms for cryptography in which the same key value is used in both the encryption and decryption. Secret key cryptography follows an algorithm

Design and simulation of AES algorithmEncryption using VHDL
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Abstract: The Cryptographic Algorithm is most widely used throughout the world for protecting information. Cryptography is the art of secret writing, followed by the guarantee to authenticate data and important messages and protect the systems from valid attacks. It

Robust audio steganography technique using aes algorithm and MD5 hash
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Abstract Data transmission in public communication system is prone to the interception and improper manipulation by eavesdropper. Audio Steganography is the procedure of hiding the existence of secret information by zipping it into another medium such as audio

Performance evaluation of AES algorithm under Linux operating system
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Today, eleven years after being standardized, Advanced Encryption Standard (AES) is de facto a world standard for data encryption. After being published in the FIPS-197 document for the first time, continuous efforts have been made towards the algorithm improvement. In

Using Advanced Encryption Standard ( AES ) Algorithm Upgrade the Security Level of ATM Banking Systems
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Abstract Biometric ATM are used for wide range of applications like for Banking, Coupons Self service ATM. Biometrics ATM offer ATM type interface along with at-least one Biometrics capture device like Fingerprint Scanner, Iris camera, Palm/Finger Vein scanner, Face

Performance efficiency of modified AES algorithm using multiple S-Boxes
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ABSTRACT In our previous paper, we modified the Advance Encryption System ( AES ) algorithm by proposing to use multiple substitution boxes (S-Boxes). While many studies have been conducted specifically on modifying the S-box, these studies were made to

Hardware visualization of the advanced encryption standard ( aes ) algorithm
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Abstract Advanced Encryption Standard (AES) was issued as FIPS by NIST as a successor to data encryption standard (DES) algorithms. The applications of the AES are wide including any sensitive data requires cryptographic protection before communication or

Enhancing The Encryption Process Of Advanced Encryption Standard (AES) By Using Proposed Algorithm To Generate S-Box
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Advanced Encryption Standard (AES) . The AES algorithm is a symmetric block cipher that can encrypt, (encipher), and decrypt, (decipher), information. Encryption converts data to an into its original form, which is called plaintext. The AES algorithm is capable of using

An AES-Based Encryption Algorithm with Shuffling.
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2 The AES Algorithm The Advanced Encryption Standard, also known as Rijndael, is used in cryptography worldwide Benabdellah, M., MM Himmi, N. Zahid, F. Regragui and EH Bouyakhf. Encryption-compression of images based on FMT and AES algorithm ; Appl. Math

Avalanche Effect of AES Algorithm
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Abstract Efficient implementation of block cipher is important on the way to achieving high efficiency with good understand ability. Numerous number of block cipher including Advance Encryption Standard have been implemented using different platform. However the

Design and Simulation of AES Algorithm for Cryptography
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Abstract: The demand for protection increases, if the confidentiality of the information is of very high value. Security is very essential to avoid the unauthorised disclosure or alteration of the information. Due to the great change in technologies nowadays, a number of

Implementation of AES algorithm using Verilog
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Abstract Advanced Encryption Standard (AES), also known as Rijndael, is an encryption standard used for securing information. AES was published by NIST (National Institute of Standards and Technology). AES is a block cipher algorithm that has been analyzed

Securing Data in Cloud Using AES Algorithm
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Abstract: With the large growth of important data on cloud, cloud security is obtaining a lot of vital than even before. The cloud information and services reside in massively ascendible information centers and might be accessed all over. The expansion of the cloud users has

A Compound Algorithm Using Neural and AES for Encryption and Compare it with RSA and existing AES
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AES Seema Rani Department of Computer Science and Engineering, SPGOI, Rohtak, India. Dr Harish Mittal Director, SPGOI, Rohtak, India. Abstract In this paper we introduce a improved AES Algorithm which is a combination of AES and neural net

Design and Implementation of AES Algorithm Using FPGA
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Abstract: AES (Advanced Encryption Standard) is a specification published by the American National Institute of Standards and Technology in 2001, as FIPS 197. AES describes a symmetric-key algorithm which uses the same key for both encrypting and decrypting the

Implementation of AES algorithm on ARM processor for wireless network
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Abstract: Wireless network can offer businesses more flexible and inexpensive ways to send and receive data. The wireless network is useful to increase efficiency, greater flexibility and mobility for users. Security is major concern in wireless networks. As we share the data

A Survey on Performance Analysis of DES, AES and RSA Algorithm along with LSB Substitution
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In the RESEARCH PAPER proposed that the different performance factors are discussed such as key value computational speed and tunability They concluded that AES algorithm is better among Symmetric algorithm and RSA algorithm is found as better solution in asymmetric

Network based Security model using Symmetric Key Cryptography (AES 256 Rijndael Algorithm) with Public Key Exchange Protocol (Diffie-Hellman Key
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University Bhopal MP, India Summary The main aim of this paper is to strengthen secured communication over the Network by enhancing the strength of the AES algorithm with Diffie-Hellman key exchange Protocol. The Rijndael is

Design of high speed 128 bit AES algorithm for data encryption
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Abstract With the fast progression of data exchange in electronic way, information security is becoming more important in data storage and transmission. Cryptography is the study of mathematical techniques related to aspects of information security such as confidentiality,

High Speed Software Driven AES Algorithm on IC Smartcards
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Abstract-Despite AES is surpass in security than DES, it is still rare to be implemented in smart cards, due to the reason of deficient in AES coprocessors. Here a chip operation system (COS) called NexCard, which derived from Microsofts Windows COS, is used as the

Generating the New S-box and Analyzing the Diffusion Strength to Improve the Security of AES Algorithm
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Abstract: Shared-key (symmetric) encryption is the most fundamental cryptographic task. It is used in a large variety of applications, including protection of the secrecy of login passwords, ATM, e-mail messages, video transmissions, wireless systems and internet-

FPGA-Based Real-Time Implementation of AES Algorithm for Video Encryption
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Abstract:-Multimedia data security is becoming an important concern due to the fact that multimedia applications affect many aspects of our life. To deal with the increasing use of multimedia in industrial process, security technologies are being developed. Multimedia

Implementation of AES-GCM encryption algorithm for high performance and low power architecture Using FPGA
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ABSTRACT Evaluation of the Advanced Encryption Standard ( AES ) algorithm in FPGA is proposed here. This Evaluation is compared with other works to show the efficiency. Here we are concerned about two major purposes

Implementation Of High Speed AES Algorithm On FPGA
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Abstract In the information age of today, data and network security is as big an issue as the data communication itself. There exists no such thing as secure channel. Every communication link is vulnerable to eavesdropping to some extent; be it the internet, a

Data Encryption and Transition by AES Algorithm with UART
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Abstract: A proposed FPGA-based implementation of the Advanced Encryption Standard ( AES ) algorithm in UART Module is designed in this paper. This implementation is compared with other works to show the efficiency. The design uses an iterative looping
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